Design of Optimal Reversible Carry Look-Ahead Adder with Optimal Garbage and Quantum Cost

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Author(s) Lafifa Jamal | Md.Shamsujjoha | Hafiz Md. Hasan Babu
Pages 44-50
Volume 2
Issue 1
Date January, 2012
Keywords Delay, low power design, quantum computing, reversible gate, carry look-ahead adder.

Conventional logic dissipates more power by losing bits of information whereas reversible circuitry recovers from bit loss through unique mapping between input and output vectors. In this regard, reversible or information lossless logic has become an immensely promising technology not only in low power CMOS design and nano-technology based system, but also primal requirement for quantum computing. On the other hand, carry look-ahead adder overcomes the limitations of the ripple wave adder by computing the carry values directly from the adder input. In this paper we present compact and efficient reversible logic implementations of carry look-ahead adder. The proposed design outperforms the existing works in terms of numbers of gates, garbage outputs, quantum costs and delay. In order to show the efficiency of the proposed method lower bounds of the combinational reversible carry skip logic in terms of garbage outputs and quantum cost are proposed as well, which is first ever proposed in the literature to the best of our knowledge. This design of proposed reversible circuit is appropriate for different quantum ALU and embedded processor.

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